makefile compile gsl and numerical recipes

[habib_parisa]

I am using Ubuntu-gcc and have a large C code which uses routines from numerical recipes and GNU scientific library.
It needs a compilation compilation because each library, i.e. nr and GNUsl, needs its own flags for gcc.

Therefore I use a makefile. It works well when the code is only one file. But when the code is distributed into many files it does not work!

My question is that what should I write as the TARGET in the makefile. Either *.c or complete list of files do not work.

The scripts is :

CC                 = gcc
CFLAGS             = -Wall  -lgsl -lgslcblas
INSTALL_INCLUDEDIR = /usr/include/nr
INSTALL_LIBDIR     = /usr/lib/nr
INSTALL_LIB        = nr2c

INCLUDEDIR = $(INSTALL_INCLUDEDIR)
INCLUDES   = -I$(INSTALL_INCLUDEDIR)
LIBDIR     = -L$(INSTALL_LIBDIR)

LIBS       = -l$(INSTALL_LIB) -lm

#### What should I write here ????????? #### 

TARGET = build_grid.c  cheb_2D_tring.c  headers.c  interp_tring.c  nr_test.c  polin2.c  polint.c  pre_proc.c  read.c  utilities.c

OBJS   = $(TARGET).o

$(TARGET): $(OBJS)
	$(CC) $(OBJS) $(LIBDIR) $(LIBS) -o $(TARGET)

.c.o:
	$(CC) $(CFLAGS) $(INCLUDES) -c $< -o $@

clean:
	rm -f $(OBJS) $(TARGET)

Please help me !

Thanks in advance.

[griswolf]

What is the result you want? Is it a library? executable? Something else? Whatever it is, you put that on the left of the colon, a list of the required prerequisite "things" (object files, libraries etc) on the right, and how to put them together to make your result on the next line, tab indented. For instance, lines 25 and 26 correctly say: To make "clean" (on the left of the colon), there are no prerequisites (on the right of the colon), and you do it by using the rm -f command on $(OBJS) and $(TARGET) (on the tab indented line below the target and prerequisites line

I don't really understand

• line 15: Why is TARGET a list of c files?
• line 17: My version of make (GNU Make 3.81) creates OBJS = build_grid.c.o cheb_2D_tring.c.o etc. Very probably not what you wanted.
• line 19: Says how to build $(TARGET) which is a list of c files. Almost certainly not what you wanted, particularly considering line 20

so... line 13 is kind of moot until you fix the other issues.

Suggest you do a brief tutorial on makefiles. Here's one: http://makepp.sourceforge.net/1.19/makepp_tutorial.html
And of course, here's the definitive GNU make manual