I have a block of MIPS code that implements a pseudo-instruction operating on the values from two registers. The problem is i am having trouble undertanding what it does. The code is:

sll $t0, $s0, 31
srl $s0, $s0, 1
srl $s1, $s1, 1
or $s1, $s1, $t0

I think it is a divide by 2 checker? If any one can help me out with what it does, that would be great.
Cheers

I have a block of MIPS code that implements a pseudo-instruction operating on the values from two registers. The problem is i am having trouble undertanding what it does. The code is:

sll $t0, $s0, 31
srl $s0, $s0, 1
srl $s1, $s1, 1
or $s1, $s1, $t0

I think it is a divide by 2 checker? If any one can help me out with what it does, that would be great.
Cheers

I have little knolage of assembler but here is my thoughts

sll $t0, $s0, 31

We are shifting whatever is in $s0 left 31 places, assuming we have a 32 bit register.. this will mean that if the lowest bit is 1 then the result will be
10000000000000000000000000000000 and if the lowest bit is 0 then result 00000000000000000000000000000000 this will be put in the register dictated by $t0....

srl $s0, $s0, 1

shift whatever is in $s0 right 1 and assign it to $s0.. I don't see $s0 being used again.. therefor don't have a clue why we would do this...

srl $s1, $s1, 1

whatever is in $s1 will be shifted right 1 placed back into $s1

or $s1, $s1, $t0

or the two values together then place them back into $s1.
so since we have shifted s1 right one, Its highest bit will be 0, therefor the highest bit of the future s1 depends on the lowest bit of $s0.

Thefore what this appears to do, is if s0 is even, the resulting number will will have 0 in the highest bit, while if s0 is odd the resulting number will have 1 in the highest bit.....

why we would do this, I don't know... But please somone enlighten me

After I was completly wrong, I sent an email off to my dad, He has some experiance programming in assembler
Here is his response

sll $t0, $s0, 31
srl $s0, $s0, 1
srl $s1, $s1, 1
or $s1, $s1, $t0

Mips assembler is in the form
opcode destination source2 source1
Haven't used the MIPS but I do have the manual.

It's a macro
$t0 is a temp register
$s0 and $s1 will be source registers for a 64 bit value. $s0 is the
high 32 bits.

sll $t0, $s0, 31

Puts the low bit into the top bit position of $t1 assuming the shift
count is one based.

srl $s0, $s0, 1

s0 is shift right one and top bit position is zero.

srl $s1, $s1, 1

Remove the bottom bit of $s1

or $s1, $s1, $t0

or in bottom bit from $s0

It's a 64bit right shift $s1 is the low 32 bits, $s0 is the high 32 bits.

sll $t0, $s0, 31
srl $s0, $s0, 1
srl $s1, $s1, 1
or $s1, $s1, $t0

It's a macro fragment and the macro header would help.

$t0 is a temp register, $S0 and $S1 are a 64 bit value ( $S0 is the high 32 bits, $S1 low 32 bits. After excecution the 64 bit value will be logicaly shifted right one bit possition.

It works lik this.
sll $t0, $s0, 31 Put bit 0 of the high bits into bit position 31 in temp.
srl $s0, $s0, 1 High bits right 1 bit position
srl $s1, $s1, 1 Low bits right 1 bit position
or $s1, $s1, $t0 Or in the bit shift out of the high register

Regards

Opps I didn't see that you had posted the answer.

Be a part of the DaniWeb community

We're a friendly, industry-focused community of developers, IT pros, digital marketers, and technology enthusiasts meeting, networking, learning, and sharing knowledge.