Hi I'm new and have a question regarding MIPS hardware single cycle datapath. I've search and looked through many textbooks and I couldn't find the answer to my question. My question is how does a shift instruction (srl, sll, etc.) get interpreted and travel through a single cycle datapath. Everything I come across acknowledges various R type, J type and I type instructions, but never explains the shift instruction in particular, which doesn't seem to be compatible with all the single cycle data path models given. There is a 16 bit immediate field into an extender for I type instructions, so the only way it even seems remotely possible for a shift instruction to work is if the 5 bit shift amount field somehow goes into this extender. So basically, my question is where does the 5 bit shift amount field go into in a single cycle datapath. Here is an example of a model, all models I've looked at follow this similar structure. http://www.cse.lehigh.edu/~mschulte/ece201-02/lect/lec08.pdf#search=%22mips%20single%20cycle%20data%20path%22
What I'm leaning towards thinking is that there is a separate module that is not presented that handles shift instruction. Any help or clarification would be greatly appreciated, thanks.